Abstract: In this paper, a low power independent-gate, process variation tolerant double gate (DG) Fin FET based sense amplifier design has been proposed. As like RHIGSA, new design exploits the DICE (dual interlock cell) latch and the back gate of a double-gate Fin FET (DG Fin FET) device for dynamic compensation against process variation. But, there is change in tail transistor gate connections.,Which is dynamically controlled by intermediate signal in circuit. This design improves the power dissipation and show excellent tolerance to process parameter variations like temperature, V_dd, thickness of oxide compared to Radiation hardend IGSA (RHIGSA) circuit and independent gate sense amplifier (IGSA). Proposed technique consumes 29.108% less power compare to RHIGSA.

Keywords: Double Gate FIN FET, Sense Delay, Process Variation, Montecarlo Simulation